Common memory 1 and common memory 2 are handled together in terms of timing. However, to maintain the uniqueness of data

During battery-less operation, previous fault information and other 'history of RAS' are not saved. Only the present RAS

Filter instructions are system FBs. System FBs that can be equalized are limited to_ The last value of the edge detectio

Usually, set the CPU No. to 0. The CPU No. 0 works as a master of an SX bus system. In a multi-CPU system or a CPU redu

Check the following system memory. (1) Configuration information %MW10.52 to %MW10.67 (WSM52 to 67) (2) Configuratio

The following are necessary. 1) Hardware: General-purpose communication module (NP1L-RS1/RS2/RS3/RS4/RS5) whose fi

Refer to 'Appendix 3-2 Procedure for Changing Resource (CPU type)' in the User's Manual 'Instructions' (FEH200 with inde

One loop of control requires FB instances of about 300 words. Accordingly a CPU with FB instances for at least 18 K word

This is because the SX bus loop-back plug is not connected. Connect a loop-back plug to the base board.

Once an error history is generated, it is retained internally within the FL-net module and is cleared when the power is

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GLOBAL > PLC > SPH

Latest FAQ

When I write parameter to LonWorks module (NP1L-LW1) using support tool for a LonWorks (NP4N-LNDF), what is the required cable?
When I set the high-speed counter module (NP1F-HC2) to the preset operation mode of the multi-functional counter FB, the preset is disabled in the ...
Are there any restrictions on the mounting position of the I/O modules and communication modules on the base? I'd like to place the communication m...
When using a communication module (NP1L-RS1/RS2/RS3/RS4/RS), the FB outputs R_STS 'C0' (Hardware error detected) during receiving. In this case, ho...
When I attempted to download a project to a CPU with user ROM card by using D300win, a message appeared saying 'Invalid loader command process!' an...

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FAQ within [ SPH ]

211-220 of Total 235

≪ 22 / 24page ≫

With the common memory of FL-net, I set word data with common memory 2 and bit data with common memory 1. Please describe the timing of transmissio...

Common memory 1 and common memory 2 are handled together in terms of timing. However, to maintain the uniqueness of data including those in common memory 1 a... Show Detail
- No：1311
- Displayed Date：2023/04/25 19:00
- Category： Communication (Others)
When you use battery-less operation on the SPH, is the history of RAS information recorded?

During battery-less operation, previous fault information and other 'history of RAS' are not saved. Only the present RAS information is displayed. Show Detail
- No：1579
- Displayed Date：2023/04/25 19:00
- Category： Main unit
I want to equalize filter instructions in a redundant system.

Filter instructions are system FBs. System FBs that can be equalized are limited to_ The last value of the edge detection FB, present counter value of the co... Show Detail
- No：1563
- Displayed Date：2023/04/25 19:00
- Category： Application
A CPU module has a rotary switch (0 to F) for setting the CPU No. on its front. What CPU No. should I set?

Usually, set the CPU No. to 0. The CPU No. 0 works as a master of an SX bus system. In a multi-CPU system or a CPU redundant system which uses multiple CPU ... Show Detail
- No：1504
- Displayed Date：2023/04/25 19:00
- Category： Main unit
I use the hot plug base board with station No. setup function (Type_NP1BS-13D). When I remove a module, how can I identify the removed module in D3...

Check the following system memory. (1) Configuration information %MW10.52 to %MW10.67 (WSM52 to 67) (2) Configuration fault information %MW10.68 to %MW1... Show Detail
- No：1482
- Displayed Date：2023/04/25 19:00
- Category： Main unit
What is necessary for MODBUS_RTU communication between SPH and an external device?

The following are necessary. 1) Hardware: General-purpose communication module (NP1L-RS1/RS2/RS3/RS4/RS5) whose firmware version is V42 or later ... Show Detail
- No：1469
- Displayed Date：2023/04/25 19:00
- Updated DTM：2023/06/09 13:29
- Category： Communication (Others)
How can I change the CPU type in an already created project?

Refer to 'Appendix 3-2 Procedure for Changing Resource (CPU type)' in the User's Manual 'Instructions' (FEH200 with index 'o' or later). Show Detail
- No：1467
- Displayed Date：2023/04/25 19:00
- Category： Support tool (D300win)
I want to execute 60 loops of PID control. Which CPU should I choose? I use the SX-programmer Expert (D300win) as a loader.

One loop of control requires FB instances of about 300 words. Accordingly a CPU with FB instances for at least 18 K words is required. This leads to the conc... Show Detail
- No：1354
- Displayed Date：2023/04/25 19:00
- Category： Function
When I downloaded a program to the CPU module, a fatal fault occurred. I checked fault diagnosis and found both the CPU and I/O modules were indica...

This is because the SX bus loop-back plug is not connected. Connect a loop-back plug to the base board. Show Detail
- No：1335
- Displayed Date：2023/04/25 19:00
- Category： Error
How does the FL-net module (Type_ NP1L-FL1/FL2/FL3) clear the error history recorded in each memory?

Once an error history is generated, it is retained internally within the FL-net module and is cleared when the power is turned off and turned on again or whe... Show Detail
- No：1567
- Displayed Date：2023/04/25 19:00
- Category： Communication (Others)